In the present day’s gorgeous computing energy is permitting us to maneuver from human intelligence towards artificial intelligence. And as our machines acquire extra energy, they’re turning into not simply instruments however decision-makers shaping our future.
However with nice energy comes nice…warmth!
As nanometer-scale transistors swap at gigahertz speeds, electrons race via circuits, dropping power as warmth—which you are feeling when your laptop computer or your cellphone toasts your fingers. As we’ve crammed more and more transistors onto chips, we’ve misplaced the room to launch that warmth effectively. As an alternative of the warmth spreading out shortly throughout the silicon, which makes it a lot simpler to take away, it builds as much as kind sizzling spots, which will be tens of levels hotter than the remainder of the chip. That excessive warmth forces methods to throttle the efficiency of CPUs and GPUs to keep away from degrading the chips.
In different phrases, what started as a quest for miniaturization has become a battle in opposition to thermal power. This problem extends throughout all electronics. In computing, high-performance processors demand ever-increasing energy densities. (New Nvidia GPU B300 servers will devour nearly 15 kilowatts of energy.) In communication, each digital and analog methods push transistors to ship extra energy for stronger alerts and sooner information charges. Within the power electronics used for power conversion and distribution, effectivity positive aspects are being countered by thermal constraints.
The power to develop large-grained polycrystalline diamond at low temperature led to a brand new method to fight warmth in transistors. Mohamadali Malakoutian
Relatively than permitting warmth to construct up, what if we might unfold it out proper from the beginning, contained in the chip?—diluting it like a cup of boiling water dropped right into a swimming pool. Spreading out the warmth would decrease the temperature of essentially the most essential units and circuits and let the opposite time-tested cooling applied sciences work extra effectively. To try this, we’d need to introduce a extremely thermally conductive materials contained in the IC, mere nanometers from the transistors, with out messing up any of their very exact and delicate properties. Enter an surprising materials—diamond.
In some methods, diamond is right. It’s one of the crucial thermally conductive supplies on the planet—many instances extra environment friendly than copper—but it’s additionally electrically insulating. Nevertheless, integrating it into chips is difficult: Till just lately we knew how you can develop it solely at circuit-slagging temperatures in extra of 1,000 °C.
However my analysis group at Stanford College has managed what appeared unattainable. We will now develop a type of diamond appropriate for spreading warmth, instantly atop semiconductor units at low sufficient temperatures that even essentially the most delicate interconnects inside superior chips will survive. To be clear, this isn’t the form of diamond you see in jewellery, which is a big single crystal. Our diamonds are a polycrystalline coating not more than a few micrometers thick.
The potential advantages might be enormous. In a few of our earliest gallium-nitride radio-frequency transistors, the addition of diamond dropped the gadget temperature by greater than 50 °C. On the decrease temperature, the transistors amplified X-band radio alerts 5 instances in addition to earlier than. We expect our diamond might be much more essential for superior CMOS chips. Researchers predict that upcoming chipmaking applied sciences might make sizzling spots virtually 10 °C hotter [see , “Future Chips Will Be Hotter Than Ever”, in this issue]. That’s in all probability why our analysis is drawing intense curiosity from the chip trade, together with Applied Materials, Samsung, and TSMC. If our work continues to succeed because it has, warmth will grow to be a far much less onerous constraint in CMOS and different electronics too.
The place Warmth Begins and Ends in Chips
On the boundary between the diamond and the semiconductor, a skinny layer of silicon carbide types. It acts as a bridge for warmth to circulation into the diamond. Mohamadali Malakoutian
Warmth begins inside transistors and the interconnects that hyperlink them, because the circulation of present meets resistance. Meaning most of it’s generated close to the floor of the semiconductor substrate. From there it rises both via layers of steel and insulation or via the semiconductor itself, relying on the package deal structure. The warmth then encounters a thermal interface materials designed to unfold it out earlier than it finally reaches a heat sink, a radiator, or some kind of liquid cooling, the place air or fluid carries the warmth away.
The dominant cooling methods at the moment focus on advances in heat sinks, followers, and radiators. In pursuit of even higher cooling, researchers have explored liquid cooling utilizing microfluidic channels and eradicating warmth utilizing phase-change supplies. Some laptop clusters go as far as to submerge the servers in thermally conductive, dielectric—electrically insulating—liquids.
These improvements are essential steps ahead, however they nonetheless have limitations. Some are so costly they’re worthwhile just for the highest-performing chips; others are just too cumbersome for the job. (Your smartphone can’t carry a conventional fan.) And none are more likely to be very efficient as we transfer towards chip architectures resembling silicon skyscrapers that stack a number of layers of chips. Such 3D systems are solely as viable as our skill to take away warmth from each layer inside it.
The massive downside is that chip supplies are poor warmth conductors, so the warmth turns into trapped and concentrated, inflicting the temperature to skyrocket inside the chip. At larger temperatures, transistors leak extra present, losing energy; they age extra shortly, too.
Warmth spreaders enable the warmth to maneuver laterally, diluting it and permitting the circuits to chill. However they’re positioned far—comparatively, in fact—from the place the warmth is generated, and they also’re of little assist with these sizzling spots. We want a heat-spreading expertise that may exist inside nanometers of the place the warmth is generated. That is the place our new low-temperature diamond might be important.
Easy methods to Make Diamonds
Earlier than my lab turned to growing diamond as a heat-spreading materials, we had been engaged on it as a semiconductor. In its single-crystal kind—like the sort in your finger—it has a wide bandgap and talent to resist huge electrical fields. Single-crystalline diamond additionally gives a few of the highest thermal conductivity recorded in any materials, reaching 2,200 to 2,400 watts per meter per kelvin—roughly six instances as conductive as copper. Polycrystalline diamond—a neater to make materials—can strategy these values when grown thick. Even on this kind, it outperforms copper.
As engaging as diamond transistors is perhaps, I used to be keenly conscious—based mostly on my expertise researching gallium nitride units—of the lengthy highway forward. The issue is considered one of scale. A number of corporations are working to scale high-purity diamond substrates to 50, 75, and even 100 millimeters however the diamond substrates we might purchase commercially had been solely about 3 mm throughout.
Gallium nitride high-electron-mobility transistors had been a really perfect take a look at case for diamond cooling. The units are 3D and the essential heat-generating half, the two-dimensional electron gas, is near the floor. Chris Philpot
So we determined as an alternative to strive rising diamond movies on giant silicon wafers, within the hope of transferring towards commercial-scale diamond substrates. Usually, that is accomplished by reacting methane and hydrogen at excessive temperatures, 900 °C or extra. This ends in not a single crystal however a forest of slim columns. As they develop taller, the nanocolumns coalesce right into a uniform movie, however by the point they kind high-quality polycrystalline diamond, the movie is already very thick. This thick development provides stress to the fabric and sometimes results in cracking and different issues.
However what if we used this polycrystalline coating as a warmth spreader for different units? If we might get diamond to develop inside nanometers of transistors, get it to unfold warmth each vertically and laterally, and combine it seamlessly with the silicon, steel, and dielectric in chips, it’d do the job.
There have been good causes to suppose it will work. Diamond is electrically insulating, and it has a comparatively low dielectric fixed. Meaning it makes a poor capacitor, so alerts despatched via diamond-encrusted interconnects won’t degrade a lot. Thus diamond might act as a “thermal dielectric,” one that’s electrically insulating however thermally conducting.
Polycrystalline diamond might assist scale back temperatures inside 3D chips. Diamond thermal vias would develop inside micrometers-deep holes so warmth can circulation from vertically from one chip to a diamond warmth spreader in one other chip that’s stacked atop it. Dennis Wealthy
For our plan to work, we had been going to need to be taught to develop diamond otherwise. We knew there wasn’t room to develop a thick movie inside a chip. We additionally knew the slim, spiky crystal pillars made within the first a part of the expansion course of don’t transmit warmth laterally very properly, so we’d must develop large-grained crystals from the begin to get the warmth transferring horizontally. A 3rd downside was that the prevailing diamond movies didn’t kind a coating on the edges of units, which might be essential for inherently 3D devices. However the largest obstacle was the excessive temperature wanted to develop the diamond movie, which might harm, if not destroy, an IC’s circuits. We had been going to have to chop the expansion temperature not less than in half.
Simply reducing the temperature doesn’t work. (We tried: You wind up, principally, with soot, which is electrically conductive—the alternative of what’s wanted.) We discovered that including oxygen to the combo helped, as a result of it repeatedly etched away carbon deposits that weren’t diamond. And thru extensive experimentation, we had been capable of finding a system that produced coatings of large-grained polycrystalline diamond throughout units at 400 °C, which is a survivable temperature for CMOS circuits and different units.
Thermal Boundary Resistance
Though we had discovered a method to develop the proper of diamond coatings, we confronted one other essential problem—the phonon bottleneck, also referred to as thermal boundary resistance (TBR). Phonons are packets of warmth power, in the best way that photons are packets of electromagnetic power. Particularly, they’re a quantized model of the vibration of a crystal lattice. These phonons can pile up on the boundary between supplies, resisting the circulation of warmth. Decreasing TBR has lengthy been a aim in thermal interface engineering, and it’s usually accomplished by introducing completely different supplies on the boundary. However semiconductors are suitable solely with sure supplies, limiting our selections.
Thermal scaffolding would hyperlink layers of heat-spreading polycrystalline diamond in a single chip to these in one other chip in a 3D-stacked silicon. The thermal pillars would traverse every chip’s interconnects and dielectric materials to maneuver warmth vertically via the stack. Srabanti Chowdhury
In the long run, we bought fortunate. Whereas rising diamond on GaN capped with silicon nitride, we noticed one thing surprising: The measured TBR was much lower than prior reports led us to expect. (The low TBR was independently measured, initially by Martin Kuball on the College of Bristol, in England, and later by Samuel Graham Jr., then at Georgia Tech, who each have been coauthors and collaborators in a number of of our papers.)
Via additional investigation of the interface science and engineering, and in collaboration with K.J. Cho on the College of Texas at Dallas, we recognized the reason for the decrease TBR. Intermixing at the interface between the diamond and silicon nitride led to the formation of silicon carbide, which acted as a form of bridge for the phonons, permitting extra environment friendly warmth switch. Although this started as a scientific discovery, its technological affect was instant—with a silicon carbide interface, our units exhibited considerably improved thermal efficiency.
GaN HEMTs: The First Take a look at Case
We started testing our new low-TBR diamond coatings in gallium nitride high-electron-mobility transistors (HEMTs). These units amplify RF alerts by controlling present via a two-dimensional electron gasoline that types inside its channel. We leveraged the pioneering analysis on HEMTs accomplished by Umesh Mishra’s laboratory on the College of California, Santa Barbara, the place I had been a graduate scholar. The Mishra lab invented a specific type of the fabric referred to as N-polar gallium nitride. Their N-polar GaN HEMTs exhibit distinctive energy density at excessive frequencies, notably within the W-band, the 75- to 110-gigahertz a part of the microwave spectrum.
What made these HEMTs such a great take a look at case is one defining characteristic of the gadget: The gate, which controls the circulation of present via the gadget, is inside tens of nanometers of the transistor’s channel. That implies that warmth is generated very near the floor of the gadget, and any interference our diamond coating might trigger would shortly present within the gadget’s operation.
We launched the diamond layer in order that it surrounded the HEMT utterly, even on the edges. By sustaining a development temperature beneath 400 °C, we hoped to protect core gadget performance. Whereas we did see some decline in high-frequency efficiency, the thermal advantages had been substantial—channel temperatures dropped by a remarkable 70 °C. This breakthrough might be a probably transformative resolution for RF methods, permitting them to function at larger energy than ever earlier than.
Diamond in CMOS
We puzzled if our diamond layer might additionally work in high-power CMOS chips. My colleagues at Stanford, H.-S. Philip Wong and Subhasish Mitra, have lengthy championed 3D-stacked chip architectures. In CMOS computing chips, 3D stacking seems to be essentially the most viable means ahead to extend integration density, enhance efficiency, and overcome the constraints of conventional transistor scaling. It’s already utilized in some superior AI chips, corresponding to AMD’s MI300 series. And it’s established within the high-bandwidth reminiscence chips that pump information via Nvidia GPUs and different AI processors. The a number of layers of silicon in these 3D stacks are largely linked by microscopic balls of solder, or in some superior circumstances simply by their copper terminals. Getting alerts and energy out of those stacks requires vertical copper hyperlinks that burrow via the silicon to achieve the chip package deal’s substrate.
In considered one of our discussions, Mitra identified {that a} essential subject with 3D-stacked chips is the thermal bottlenecks that kind inside the stack. In 3D architectures, the normal warmth sinks and different strategies used for 2D chips aren’t enough. Extracting warmth from every layer is crucial.
Our analysis might redefine thermal management throughout industries.
Our experiments on thermal boundary resistance in GaN recommended an identical strategy would work in silicon. And once we built-in diamond with silicon, the outcomes had been outstanding: An interlayer of silicon carbide shaped, resulting in diamond with a superb thermal interface.
Our effort launched the idea of thermal scaffolding. In that scheme, nanometers-thick layers of polycrystalline diamond could be built-in inside the dielectric layers above the transistors to unfold warmth. These layers would then be linked by vertical warmth conductors, referred to as thermal pillars, made from copper or extra diamond. These pillars would join to a different warmth spreader, which in flip would hyperlink to thermal pillars on the subsequent chip within the 3D stack, and so forth till the warmth reached the warmth sink or different cooling gadget.
The extra tiers of computing silicon in a 3D chip, the larger distinction thermal scaffolding makes. An AI accelerator with greater than 5 tiers would properly exceed typical temperature limits except the scaffolding was employed. Srabanti Chowdhury
In a collaboration with Mitra, we used simulations of warmth generated by actual computational workloads to function a proof-of-concept construction. This construction consisted of dummy heaters to imitate sizzling spots in a two-chip stack together with diamond warmth spreaders and copper thermal pillars. Utilizing this, we reduced the temperature to one-tenth its worth with out the scaffolding.
There are hurdles nonetheless to beat. Specifically, we nonetheless have to determine a method to make the highest of our diamond coatings atomically flat. However, in collaboration with trade companions and researchers, we’re systematically learning that downside and different scientific and technological points. We and our companions suppose this analysis might supply a disruptive new path for thermal administration and a vital step towards sustaining high-performance computing into the long run.
Creating Diamond Thermal Options
We now intend to maneuver towards trade integration. For instance, we’re working with the Defense Advanced Research Projects Agency Threads program, which goals to make use of device-level thermal administration to develop extremely environment friendly and dependable X-band energy amplifiers with an influence density 6 to eight instances as environment friendly as at the moment’s units. This system, which was conceived and initially run by Tom Kazior, is a essential platform for validating using low-temperature diamond integration in GaN HEMT manufacturing. It’s enabled us to collaborate intently with trade groups whereas defending each our and our companions’ processes. Protection functions demand distinctive reliability, and our diamond-integrated HEMTs are present process rigorous testing with trade companions. The early outcomes are promising, guiding refinements in development processes and integration strategies that we’ll make with our companions over the subsequent two years.
However our imaginative and prescient extends past GaN HEMTs to other materials and notably silicon computational chips. For the latter, we now have a longtime collaboration with TSMC, and we’re increasing on newer alternatives with Utilized Supplies, Micron, Samsung, and others via the Stanford SystemX Alliance and the Semiconductor Research Corp. That is a unprecedented degree of collaboration amongst in any other case fierce opponents. However then, warmth is a common problem in chip manufacturing, and everyone seems to be motivated to seek out the most effective options.
If profitable, our analysis might redefine thermal administration throughout industries. In my work on gallium nitride units, I’ve seen firsthand how once-radical concepts like this transition to grow to be trade requirements, and I consider diamond-based warmth extraction will observe the identical trajectory, turning into a essential enabler for a technology of electronics that’s not hindered by warmth.
This text seems within the November 2025 print subject as “Diamond Blankets Will Chill Future Chips.”
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